hybrid multilevel power devices can be used, so the same topology,Grid tie inverter, take full advantage of the power switch to the respective advantages. Asymmetric h hybrid multi-level inverter bridge is the most basic, the most typical topology, its half-bridge power switch can work at the fundamental frequency and high-frequency pwm way, with the traditional multi-level inverter phase The ratio, in the case of the same output level number, reducing the power device, to reduce the switching loss [1,2]. The first asymmetric h bridge five-level inverter, its structural features, proposed a universal modulation strategy. Finally, experimental platform to the asymmetric capacitor clamped h-bridge topology for the experimental validation of the proposed modulation strategy.
asymmetric h bridge five-level inverter
The Asymmetric h-bridge topology in
basic hybrid multi-level topology, the most typical topology, its half-bridge power switch can work at the fundamental frequency and high-frequency pwm way with the traditional multi-level inverter compared in the same level as the number of output and reduce the power devices, reducing the switching loss. The most useful of the three five-level asymmetric h bridge: bidirectional switches asymmetric h bridge, the diode clamp asymmetric h bridge and capacitor clamped asymmetric h bridge, are shown in Figure 1 (a), (b), (c) shown below. Figure 1 (a) of the bidirectional switch five-level inverter through the two-way switches (S5, and d1 to d4) and h bridge (S1 to S4), and outputs the voltage combination of the two DC power supply e Five-level AC voltage; Figure 1 (b) diode clamped five-level inverter, the left half of the bridge for diode clamped Sanden Pingban, bridge and right half bridge two power Pingban bridge, while Figure 1 (c) capacitance clamped five-level inverter,Grid tie inverter, the left half bridge capacitor clamped three the electric Pingban bridge.
traditional multi-level inverter three categories: the diode clamped, flying capacitor the h bridges cascade Schedule for the five-level inverter single phase power devices required comparative table, with traditional the three types of five-level inverter compared to the first three categories topology using voltage stress 1:1 power switch, the topology required power switch up,power inverter; Figure 1 Asymmetric h bridge five-level inverter hybrid applications The voltage stress ratio 1:2 power switch, five-level voltage output less power switch, from the point of view of the number of output voltage level and the number of power switches have a greater advantage than the first three categories topology.
3 common modulation strategy
already
Figure 1 h bridge asymmetric five-level inverter modulation strategy specific sub-harmonic elimination method [3] and a square wave - eliminate harmonics pwm synthesis modulation strategy [4], the former in frequent occasions wide speed range of the motor drive, the look-up table value and the true value of the switching transition time between there is a certain deviation, which need to be high, low-frequency power switching half-bridge separating modulation, calculated high-frequency the modulated wave of the half-bridge of the power switch, increasing the complexity of the modulation strategy. To solve these problems, this paper presents the versatility of a non-symmetric h bridge five-level inverter modulation strategies.
the general modulation strategies
3.1 Principle
used the "half-bridge"
Currently, there are three types: the the two power Pingban bridge hb1, the the diode clamp n electric Pingban bridge hb2, the capacitive clamp type n electric Pingban bridge hb3. Orderly mixing these three types of "half-bridge", constitutes a Universal asymmetric h bridge shown in Figure 2. Figure hbx 'said this "half-bridge" with respect to hbx less resistance to high-voltage power switch work in the the ladder wave modulation Zeyi more low-voltage power switch in hbx pwm modulation state, x is 1, 2, 3, even m standard Mody coefficient of the output voltage of the DC power supply voltage of each level is e. Asymmetric h bridge pwm modulation state the half bridge hbx the power switch withstand e shutdown voltage stress, right half bridge hbx ', the power switch to withstand the maximum voltage stress off need to reach me, limiting its The power switch is only for low-frequency, high voltage devices. In Figure 1, the three asymmetric H bridge five level topology is a special case of Figure 2 Universal asymmetric H bridge when m = 1.
of Figure 2 generic non symmetric the h bridge right half bridge operation at the fundamental frequency of the square wave modulation, the driving signal and the modulated wave zero crossings synchronization. According to the position and the left half bridge hbx output voltage level corresponding to the switching state where the positive and negative regions of the modulated wave, to determine the distribution state of the carrier within a fundamental cycle. The three types of "half-bridge" in the power switch is a complementary pair, so the number of carriers of the the left half bridge hbx's power switch complementary pair quantity, that is, DC power supply subscript Mody coefficients m. Asymmetric h bridge topology common modulation strategy in Figure 3, the carrier cm, cm 'according to the output voltage level corresponding to the switching state orderly laminating distribution. Positive and negative area, the position of the carrier laminate need to be determined according to the output level corresponding to the switching state,www.12vgridtiepowerinverters.com, the carrier modulated wave Vref where CI layer layered partition pwm modulation obtained on the PWM driving signal complementary to the corresponding power switch si uo makes the Asymmetric h bridge output with carrier ci corresponding the pwm level of layer. And within this time region, and other power switches are in the OFF state of the ON / OFF.
3.2 Asymmetric h bridge five-level inverter universal modulation strategy
Figure 1 Asymmetric h bridge five-level inverter working mechanism available, the right half of the asymmetric h bridge bridge power switch are working at the fundamental frequency, the left half-bridge power switch drive signal pwm complementary right, for example, Figure 1 (a) in the power switches s1, S5 (or S2, S5) complementary; Figure 1 (b) power switches s1, s3 complementary and S2, S4 complementary; Figure 1 (c) power switches S1 and S4 complementary and s2, s3 complementary,power inverter. Figure 3 common modulation principle of asymmetric h bridge asymmetric the generic modulation principle, the five-level inverter h bridge as shown in Figure 4. Asymmetric h bridge five-level inverter in the positive half cycle of the modulated wave, requires two-way vertical distribution of the carrier c1, c2, the modulated wave and the two-channel carrier spwm modulation, respectively, corresponding to the non-complementary power switch S1, a drive signal S2, so that the inverter output of the five-level corresponds to the carrier c1, c2 two PWM level layers 1,2. Right half bridge S5 a drive signal by the modulation wave, the zero-crossing point decision. In the negative half cycle of the modulated wave, the carrier staggered distribution to the negative region of the modulated wave, the completion of the negative half cycle SPWM modulation, the output the pwm level of layer 1 ', 2'.
4 experimental results
In order to verify the non-symmetrical the h bridge five-level inverter universal modulation strategy, single-phase capacitor clamped five-level asymmetric h-bridge topology experimental platform, and experimental verification. The DC bus voltage e = 20V, the carrier frequency fc = 2kHz, the modulation wave frequency fm = 50Hz modulation mA = 0.95, RL load, r = 100Ω, l = 63ml.
Figure 5 is a power switch s1, S5 drive signal experimental waveform, power switches S1 to S4 are working at high frequency PWM state power switches s5, s6 work in the baseband state. Figure 6 is an experimental waveform of the inverter output voltage and the clamp capacitor voltage, UO five-level voltage to the inverter output, uo clamp capacitor voltage of the inverter, since the positive and negative half cycle to the clamp capacitor charge and discharge the capacitor voltage smaller fluctuations, but universal modulation strategy makes the clamp capacitor voltage reaches a good balance. Figure 7 is an experimental waveform of the inverter output voltage and load current, il is the load current (at both ends of the resistance r voltage) the RL load so that the load current having a preferably sinusoidal.
5 Conclusion
In this paper, three asymmetric h bridge five-level inverter, based on an asymmetric h bridge common modulation strategy for three asymmetric h bridge five-level inverse change control. Finally, the single-phase capacitor clamped five-level inverter experiment platform, to verify the correctness and validity of the proposed method.
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