course, the buck converter input capacitance ordinary is the most important capacitance in the circuit, but it usually does not get people enough high regard. Contentment a severe ripple and noise requirements, the traditional power design way too much emphasis on the selection and layout of the output capacitor. The customer is happy to spend money for the high performance components, but often neglect the input capacitance for now, more major buck converter design for a victory. Its high-frequency characteristics and layout design victory of the resolution or not. In the trade-offs and the layout of the output capacitor, the exact greater degree of ease. Even satisfied with the output noise requirements, trade-offs and layout of the input capacitance is also very important. The input capacitance coherent stress greater than the output capacitor coherent stress, it is important that in two ways. Input the capacitance will suffer a higher rate of current change, its layout and choice of restricting the main switch voltage stress as well as 5f362915ff571c77cd467935207a enter the system noise is essential. In addition, it is higher root mean square (RMS) current stress and potential component fever making this choice is more important for the overall robustness. http://www.gridtieinverter.de/
made a sudden change of the current rate
stress in a first aspect is a move to the current change rate, i.e. dI / dT, it is represented as the voltage of all internal or stray inductance. This will give the input capacitance of the switch of the power supply to run or clamp diodes excessive voltage stress, and high-frequency noise radiation to the system. High-side buck switch is closed when the current is zero, open for the full load current. Input capacitance will suffer a square wave from zero to full load current. Ancient the MOSFETs and subsequent bypass capacitor current pick-up time is 5 ns number of grade. This fast current rate of change (dI / dT), multiplied by the total stray inductance (L), to constitute a voltage spike on the buck switch. On the other hand, the output capacitor withstand a by the chokes peak-to-peak current limit the output choke advection and current waveforms.
Normally, the ripple current of the output choke is designed limited to the full load current of 40% or more with a small current. On 500 kHz, the buck converter running 10% duty cycle, the symbol of 40% of the load current rise time of 200 ns. That is an increase of 100%, 5 ns than 200 ns rise 40% current change rate 100 times. A given inductor voltage, the situation is this predicament. For high duty cycle or low output chokes ripple current design, this ratio is much more than 100 times.
capacitor RMS current
The second aspect of the
stress RMS current. The results obtained by the square of the current multiplied by the associated capacitance and equivalent series resistance (ESR) of heat. Overheating will shorten component life, and even lead to catastrophic failure. The input capacitance of the RMS current is the load current multiplied by the square root of (D * (1-D)), where D is the duty cycle of the buck switch. For the 5-V input and 12-V output, D is about 1/4 RMS current is 43% of the output current. Synchronous rectifier input of the 12-V and 1-V output case, D is approximately 1/10, and 30% of the RMS current is the output current. On the other hand, the output capacitor current serrated RMS current is the inductor peak-to-peak ripple current divided by √ 12. Inductor peak to peak ripple current step-down design for a 40% load current, the output capacitor RMS current is only 12% of the output current, that is 25 times smaller than the input capacitor current.
capacitance inductance and ESR
ordinary package size mount ceramic capacitors in the name of 1608-3225) from 0603 to 1210 (metric sizes ranging. AVX use of the handbook, we know inductance individual is about 1 nH. On normal and 2917 (Metric size 7343) package size chip type tantalum capacitors with electrolyte capacitor, inductor is approximately 4 to 7 nH. Which the wire size played a major role,www.12vgridtiepowerinverters.com. Additional 1210 package size ,63-V to 16-V voltage ceramic capacitor's ESR of about 1 to 2 MΩ. Chip type tantalum capacitor exists a model of a 50 to 150 mΩ ESR areas. This resolution to avoid overheating the maximum allowable RMS current. Although 1210 package size ceramic capacitors can answer 3 A RMS, Best tantalum capacitor size 1210,power inverter, however, only dispose of a current of 05 A, the larger size of the 2917 be able to dispose of about 17 A current. Recently, a multi-anode tantalum capacitors have been beginning to supply its inductance with resistance dropped by half.
design discretion
design examples (see Figure 1) shows a 6 A current 12V to 12 V input voltage to the circuit shown circuit. It uses a run at 300 kHz abstinence (TPS40190). The user preferences discretion aspect is the low capital and a brief list (BOM). Input and output capacitance for a given scale for 1210 package 22-μF ,16-V ceramic capacitor. These capacitors are able to handle 3 A RMS, and fever smallest. The input capacitance, users are generally not concerned about the voltage ripple, and only care whether the current is too high. Duty cycle of the input voltage at its minimum value of the 5-V Vout / Vin 025, the emergence of the extreme circumstances. RMS current Iout × √ (D × (1-D)), that is, 26 A. Design, the output ripple voltage limit is set at less than 20 mV peak-to-peak (pp). The output inductor value is selected to 22 μH, the peak-to-peak ripple current is limited to 18A, i.e. 30% of full load. Low ESR and inductor output capacitor output ripple voltage (Vpp) of the peak-to-peak current (Ipp) divided by the output capacitor (Cout) multiplied by 2π times the switching frequency (F), Vpp = Ipp / (2π × F × Cout). Suppose a Vout the malformation value to 80% of the capacitance has a 20% tolerance, the need of three capacitors.
test focus and Discussion
peak - peak input ripple voltage of approximately 200 mV (see Figure 3), (see Figure 2) is 10 times larger than the output ripple voltage. The application of three input capacitance rather than one, then the input ripple voltage is still three times larger than the output ripple voltage. Some stringent customer requirements to the input ripple voltage holding less than 100 mV,Grid tie inverter, because the system noise problem, request application of the three input capacitance. In addition, compared to nearly sinusoidal output ripple, input voltage waveform has revealed much serrated. Thus, the high-frequency harmonics. Because ripple request individual settings as the 20-MHz bandwidth measurement scale, so can not see the whole capacitor stray inductance. Input capacitance caused ripple 3,13 V input and load 6A premise (5 mV / DIV) main power switch of a ripple on the output capacitor 2,13 V input and 6A load premise (5 mV / DIV)
a 470-μF aluminum electrolytic capacitor to replace the 22-μF ceramic input capacitor
use, as shown in Figure 1 Q4 on the peak voltage stress from 26 V to add to 29 V, which is just below its 30-V additional value. In addition, the effectiveness of the converter will be reduced from 854% to 831%, which is due to the input capacitance of 234 mW ESR rated loss. Use of a single 22-μF ceramic capacitors up to 05 inches (12 cm), but with the power switch interval, then we see that the peak switch voltage presents similar rebound, but the effectiveness has not landed. Similar design of different customers, we see the presence of the ambitious noise peaks (up to 80 mV) output. Increase a 22-μF capacitor can dispel these peak close to the main switch.
layout guidelines
Figure 4 shows a nearly optimize the layout instance, the input bypass capacitor C1 and C2 (both 1206 size) bridge high side Q1 drain and low side Q2 source (both large metal drain pad SO- 8 size). Minimize stray inductance optimization main switch and input capacitance layout low inductance bypass capacitor near the main the buck power switch (asynchronous converter switches and clamping diodes) placement of the basic requirements, the goal is to reduce component stress and high-frequency noise. The nominal mount ceramic capacitors most out of this requirement. Unmatched input capacitance, output capacitance and series inductance of the exact position is not so important. Boost converter, the input and output capacitance contrary, this is due to the output capacitor input inductor current and switch current stratospheric.
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